The present invention relates to semiconductor device fabrication and integrated circuits and, more specifically, to structures that include contact trenches and isolation trenches, as well as methods for forming structures including contact trenches and isolation trenches.
Devices fabricated using semiconductor-on-insulator (SOI) technologies may exhibit certain performance improvements in comparison with comparable devices built directly in a bulk silicon substrate. Generally, a SOI substrate includes a device layer of semiconductor material, a handle wafer, and a buried oxide or BOX layer physically separating and electrically isolating the device layer from the handle wafer. Integrated circuits may be fabricated using the semiconductor material of the device layer.
High-voltage integrated circuits typically require specialized circuit technology capable of withstanding substantial voltages. In order to maintain standard well implants prevalent in complementary-metal-oxide semiconductor (CMOS) technologies and to provide a sufficient volume of semiconductor material to provide a drift region of laterally-diffused metal-oxide-semiconductor (LDMOS) device structure, a relatively thick device layer may be desired.
Improved structures that include contact trenches and isolation trenches, as well as methods for forming structures including contact trenches and isolation trenches, are needed.